VLSI - Verification for Pune

VLSI - Verification

The Role
Primary responsibilities will include
 Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’
 Writing tests, functional coverage using ‘e’ and mapping these to Verification plan
 Functional verification of the design and achieve verification goals
 VHDL / Verilog RTL/Testbench coding
Required Skills
 An excellent knowledge of digital design / verification techniques
 Minimum 2yrs experience with Specman based verification for developing VE, VC, writing tests, functional coverage.
 Experience of VHDL and/or Verilog programming languages.
 Exposure to scripting language/s

Working Environment :  The successful applicant will work in a team of around 10-12 hardware design / verification engineers
Experience : 2-3 yrs in the above mentioned areas.
Qualifications : B.Tech / B.E. with first class in electronic engineering or related stream.


Thanks & Regards
Sana
Sana@roljobs.com
Roland & Associates